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Isplever Tutorial

  1. Lattice Isplever Tutorial
  2. Isplever Tutorials
  1. FPGA Design with ispLEVER Tutorial 1 FPGA Design with ispLEVER Tutorial Introduction This tutorial is intended for a new user or a user who uses ispLEVER infrequently. It shows you how to use several processes, tools, and reports from the ispLEVER software suite to implement a simple (RTL) Verilog or VHDL design in a LatticeEC family device.
  2. Meminitebr.mem bootloader file in the ispLEVER. The file meminitebr.mem is the compiled file. It is the program bootloader which will be placed in the XP2 EBR non volatile memory. For the bootloader reference guide, refer section Tutorial: Running ERIKA on Mico32 and FPG-EYE. Be sure that the file is present in the ispLever project directory.
  3. The PC- and Linux-based ispLEVER upgrade packages include Lattice’s USB download cable. IspLEVER PRO By upgrading to ispLEVER PRO, you’ll get all the same ispLEVER features, plus the Lattice IP core Value Suite. This IP suite includes DDR and DDR2 controllers, FFT compiler, FIR filter and the Tri-speed Ethernet MAC.

IspLEVER Tutorials Introduction FPGA Block Modular Design Tutorial 2 Establish location and timing objectives for the top-level design. Archive and deploy sub-module projects. Implement a sub-module project. Perform incremental verification of the top-level project. Assemble and verify the top-level project. Time to Complete This Tutorial The time to complete this tutorial is about 45 minutes.

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Basic Information


  • SDU Course Number: SD01331470, SD01331480
  • Instructor(s): Assistant Prof Feng Li (李峰, fli@sdu.edu.cn)
  • Terms offered: Fall 2016
  • Level: Undergraduate
  • Teaching Assistant(s): Ms Zhenjuan Qiao (乔贞娟, 1847086166@qq.com), Mr Pengfei Wang (王鹏飞, 8144756@qq.com)

Course Description


This course is to introduce the basic organization and design principles of computers. The topics include computer instructions, arithmetics, processor design, storage hierarchy, etc. Through taking this course, students will understand how a computer works and how to design a computer, from the perspectives of both hardware and software.

This course consists of two parts: lectures (SD01331470) and project design (SD01331470). The grades for SD01331470 will be based on the students' performance on assignments (20%), and final exam (80%), while the ones for SD01331470 will be given according to demos and experiment reports delivered by the students.

Remarks: This website is in construction. Related materials will be uploaded as soon as possible. If you have any problem about this website, please feel free to drop me an email.

Lecture Notes


Slides for lectures
  • Computer Abstractions and Technology [PDF]
  • Instructions: Language of the Computer [PDF]
  • Arithmetic for Computers [PDF]
  • The Processor [PDF]
  • Large and Fast: Exploiting Memory Hierarchy [PDF]
Slides for experimentsIsplever classic tutorial
  • Introduction [PDF]
    We introduce the roadmap of our experiments.
  • Experiment platform [PDF]
    We introduce the basic knowledge of EDA and PLD, as well as the platform of our experiments.
  • Introduction to Quartus [PDF]
    We introduce the software platform of our experiments, Quartus. Please refer to Quartus II tutorial.

Experiments


A detailed report for each of the following experiment is required. The related materials are in Chinese. Details can be found in the experiment tutorial as well as the following slides. The template of experiment report can be downloaded by clicking here.
ExperimentDue Date (Demo)Due Date (Report)
Circuit for logical operationsOct 18, 2016Oct 25, 2016
A 4-bit Adder based on two's complementOct 27, 2016Nov 3, 2016
ShifterNov 1, 2016Nov 8, 2016
8-bit ALUNov 4, 2016Nov 11, 2016
4-bit ALU based on two's complementNov 10, 2016Nov 17, 2016
Microprogram control unitNov 18, 2016Nov 25, 2016
A prototype of CPUNov 24, 2016Dec 1, 2016
A demo of prototypical computersDec 1, 2016Dec 8, 2016
Project Design: A prototypical computerDec 15, 2016Dec 29, 2016
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Assignments

Isplever Tutorial
Students are supposed to submit their solutions before the due date.
  • Assignment 1 [PDF] [Due Date: Sep 18, 2016]
  • Assignment 2 [PDF] [Due Date: Oct 10, 2016]
  • Assignment 3 [PDF] [Due Date: Nov 7, 2016]

Tutorials

Lattice Isplever Tutorial

  • ispLEVER tutorial i (released by Latticesemi) [PDF]
  • ispLEVER tutorial ii (for designing an adder) [PDF]
  • Quartus II tutorial [PDF]

Useful Links

Isplever Tutorials

ClassicIsplever
  • Adder on Wiki: link
  • Interesting comments: link
  • CD resources of the textbook: link
  • PDF version of the textbook: link
  • To be added...